/*========================== begin_copyright_notice ============================

Copyright (C) 2017-2021 Intel Corporation

SPDX-License-Identifier: MIT

============================= end_copyright_notice ===========================*/

/*
 * !!! DO NOT EDIT THIS FILE !!!
 *
 * This file was automagically crafted by GED's model parser.
 */


#ifndef GED_ENUMERATIONS_H
#define GED_ENUMERATIONS_H

typedef enum
{
    GED_ACCESS_MODE_Align1,  ///< 10, 7, 7.5, 8, 8.1, 9
    GED_ACCESS_MODE_Align16, ///< 10, 7, 7.5, 8, 8.1, 9
    GED_ACCESS_MODE_INVALID
} GED_ACCESS_MODE;
typedef enum
{
    GED_ACC_WR_CTRL_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_ACC_WR_CTRL_AccWrEn, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_ACC_WR_CTRL_INVALID
} GED_ACC_WR_CTRL;
typedef enum
{
    GED_ADDR_MODE_Direct,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ADDR_MODE_Indirect, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ADDR_MODE_INVALID
} GED_ADDR_MODE;
typedef enum
{
    GED_ARCH_REG_null,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_a0,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_acc,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_f,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_ce,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_msg,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_ARCH_REG_sp,      ///< 10, 11, TGL, 7.5, 8, 8.1, 9
    GED_ARCH_REG_sr0,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_cr0,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_n0,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_ip,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_tdr,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_tm0,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_fc,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7.5, 8, 8.1, 9
    GED_ARCH_REG_dbg0,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_ARCH_REG_n,       ///< XE2, XE3, XE3P.CRI
    GED_ARCH_REG_s,       ///< XE3, XE3P.CRI
    GED_ARCH_REG_INVALID
} GED_ARCH_REG;
typedef enum
{
    GED_ATOMIC_OPERATION_TYPE_AOP_AND,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_OR,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_XOR,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_MOV,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_INC,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_DEC,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_ADD,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_SUB,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_REVSUB, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_IMAX,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_IMIN,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_UMAX,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_UMIN,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_CMPWR,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_AOP_PREDEC, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_ATOMIC_OPERATION_TYPE_INVALID
} GED_ATOMIC_OPERATION_TYPE;
typedef enum
{
    GED_BLOCK_SIZE_OW1L,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_BLOCK_SIZE_OW1H,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_BLOCK_SIZE_OW2,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_BLOCK_SIZE_OW4,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_BLOCK_SIZE_OW8,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_BLOCK_SIZE_INVALID
} GED_BLOCK_SIZE;
typedef enum
{
    GED_BRANCH_CTRL_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_BRANCH_CTRL_Branch,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_BRANCH_CTRL_INVALID
} GED_BRANCH_CTRL;
typedef enum
{
    GED_CHANNEL_MASK_R,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_MASK_NotIncluded, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_MASK_B,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_MASK_G,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_MASK_A,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_MASK_INVALID
} GED_CHANNEL_MASK;
typedef enum
{
    GED_CHANNEL_MODE_Oword,   ///< 9
    GED_CHANNEL_MODE_Dword,   ///< 9
    GED_CHANNEL_MODE_INVALID
} GED_CHANNEL_MODE;
typedef enum
{
    GED_CHANNEL_OFFSET_M0,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M4,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M8,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M12,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M16,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M20,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M24,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_M28,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_CHANNEL_OFFSET_INVALID
} GED_CHANNEL_OFFSET;
typedef enum
{
    GED_COND_MODIFIER_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_z,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_nz,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_g,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_ge,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_l,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_le,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_o,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_u,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_COND_MODIFIER_INVALID
} GED_COND_MODIFIER;
typedef enum
{
    GED_CONV_DST_DATATYPE_e2m1,    ///< XE3P.CRI
    GED_CONV_DST_DATATYPE_int4,    ///< XE3P.CRI
    GED_CONV_DST_DATATYPE_INVALID
} GED_CONV_DST_DATATYPE;
typedef enum
{
    GED_CONV_SRC_DATATYPE_HF,      ///< XE3P.CRI
    GED_CONV_SRC_DATATYPE_BF,      ///< XE3P.CRI
    GED_CONV_SRC_DATATYPE_INVALID
} GED_CONV_SRC_DATATYPE;
typedef enum
{
    GED_CONV_SRC_DATATYPE2_HF,      ///< XE3P.CRI
    GED_CONV_SRC_DATATYPE2_BF,      ///< XE3P.CRI
    GED_CONV_SRC_DATATYPE2_F32,     ///< XE3P.CRI
    GED_CONV_SRC_DATATYPE2_INVALID
} GED_CONV_SRC_DATATYPE2;
typedef enum
{
    GED_DATA_TYPE_ud,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_d,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_uw,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_w,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_ub,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_b,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_df,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_f,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_uq,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_DATA_TYPE_q,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_DATA_TYPE_hf,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_DATA_TYPE_uv,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_vf,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_v,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DATA_TYPE_nf,      ///< 11, TGL, XE.HP, XE.HPG, XE.LPG.MD
    GED_DATA_TYPE_bf,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_DATA_TYPE_qf,      ///< XE.HPC.A
    GED_DATA_TYPE_bf8,     ///< XE.HPC, XE2, XE3, XE3P.CRI
    GED_DATA_TYPE_tf32,    ///< XE.HPC, XE2, XE3, XE3P.CRI
    GED_DATA_TYPE_hf8,     ///< XE3, XE3P.CRI
    GED_DATA_TYPE_INVALID
} GED_DATA_TYPE;
typedef enum
{
    GED_DATA_TYPE2_ub,      ///< XE3P.CRI
    GED_DATA_TYPE2_uw,      ///< XE3P.CRI
    GED_DATA_TYPE2_ud,      ///< XE3P.CRI
    GED_DATA_TYPE2_uq,      ///< XE3P.CRI
    GED_DATA_TYPE2_b,       ///< XE3P.CRI
    GED_DATA_TYPE2_w,       ///< XE3P.CRI
    GED_DATA_TYPE2_d,       ///< XE3P.CRI
    GED_DATA_TYPE2_q,       ///< XE3P.CRI
    GED_DATA_TYPE2_bf8,     ///< XE3P.CRI
    GED_DATA_TYPE2_hf,      ///< XE3P.CRI
    GED_DATA_TYPE2_f,       ///< XE3P.CRI
    GED_DATA_TYPE2_df,      ///< XE3P.CRI
    GED_DATA_TYPE2_hf8,     ///< XE3P.CRI
    GED_DATA_TYPE2_bf,      ///< XE3P.CRI
    GED_DATA_TYPE2_tf32,    ///< XE3P.CRI
    GED_DATA_TYPE2_uv,      ///< XE3P.CRI
    GED_DATA_TYPE2_ue5m3,   ///< XE3P.CRI
    GED_DATA_TYPE2_INVALID
} GED_DATA_TYPE2;
typedef enum
{
    GED_DATA_TYPE_SCALE_UB,      ///< XE3P.CRI
    GED_DATA_TYPE_SCALE_UE5M3,   ///< XE3P.CRI
    GED_DATA_TYPE_SCALE_UE4M3,   ///< XE3P.CRI
    GED_DATA_TYPE_SCALE_INVALID
} GED_DATA_TYPE_SCALE;
typedef enum
{
    GED_DEBUG_CTRL_Normal,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DEBUG_CTRL_Breakpoint, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_DEBUG_CTRL_INVALID
} GED_DEBUG_CTRL;
typedef enum
{
    GED_DEP_CTRL_Normal,          ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_DEP_CTRL_NoDDClr,         ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_DEP_CTRL_NoDDChk,         ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_DEP_CTRL_NoDDClr_NoDDChk, ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_DEP_CTRL_INVALID
} GED_DEP_CTRL;
typedef enum
{
    GED_DNSCL_MODE_Mode0,   ///< XE3P.CRI
    GED_DNSCL_MODE_Mode1,   ///< XE3P.CRI
    GED_DNSCL_MODE_Mode2,   ///< XE3P.CRI
    GED_DNSCL_MODE_Mode3,   ///< XE3P.CRI
    GED_DNSCL_MODE_INVALID
} GED_DNSCL_MODE;
typedef enum
{
    GED_DPADDR_REG_SIZE_1_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_2_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_3_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_4_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_6_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_8_REG,   ///< XE2, XE3
    GED_DPADDR_REG_SIZE_INVALID
} GED_DPADDR_REG_SIZE;
typedef enum
{
    GED_DP_ADDR_SIZE_A16,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD
    GED_DP_ADDR_SIZE_A32,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SIZE_A64,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SIZE_INVALID
} GED_DP_ADDR_SIZE;
typedef enum
{
    GED_DP_ADDR_SURFACE_TYPE_FLAT,    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SURFACE_TYPE_BSS,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SURFACE_TYPE_SS,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SURFACE_TYPE_BTI,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_ADDR_SURFACE_TYPE_INVALID
} GED_DP_ADDR_SURFACE_TYPE;
typedef enum
{
    GED_DPCACHE_LOAD_USE_DEFAULT, ///< XE2, XE3
    GED_DPCACHE_LOAD_L1UC_L3UC,   ///< XE2, XE3
    GED_DPCACHE_LOAD_L1UC_L3C,    ///< XE2, XE3
    GED_DPCACHE_LOAD_L1UC_L3CC,   ///< XE2, XE3
    GED_DPCACHE_LOAD_L1C_L3UC,    ///< XE2, XE3
    GED_DPCACHE_LOAD_L1C_L3C,     ///< XE2, XE3
    GED_DPCACHE_LOAD_L1C_L3CC,    ///< XE2, XE3
    GED_DPCACHE_LOAD_L1S_L3UC,    ///< XE2, XE3
    GED_DPCACHE_LOAD_L1S_L3C,     ///< XE2, XE3
    GED_DPCACHE_LOAD_L1IAR_L3IAR, ///< XE2, XE3
    GED_DPCACHE_LOAD_INVALID
} GED_DPCACHE_LOAD;
typedef enum
{
    GED_DPCACHE_STORE_DEFAULT,   ///< XE2, XE3
    GED_DPCACHE_STORE_L1UC_L3UC, ///< XE2, XE3
    GED_DPCACHE_STORE_L1UC_L3WB, ///< XE2, XE3
    GED_DPCACHE_STORE_L1WT_L3UC, ///< XE2, XE3
    GED_DPCACHE_STORE_L1WT_L3WB, ///< XE2, XE3
    GED_DPCACHE_STORE_L1S_L3UC,  ///< XE2, XE3
    GED_DPCACHE_STORE_L1S_L3WB,  ///< XE2, XE3
    GED_DPCACHE_STORE_L1WB_L3WB, ///< XE2, XE3
    GED_DPCACHE_STORE_INVALID
} GED_DPCACHE_STORE;
typedef enum
{
    GED_DPCMASK_X,       ///< XE2, XE3
    GED_DPCMASK_Y,       ///< XE2, XE3
    GED_DPCMASK_XY,      ///< XE2, XE3
    GED_DPCMASK_Z,       ///< XE2, XE3
    GED_DPCMASK_XZ,      ///< XE2, XE3
    GED_DPCMASK_YZ,      ///< XE2, XE3
    GED_DPCMASK_XYZ,     ///< XE2, XE3
    GED_DPCMASK_W,       ///< XE2, XE3
    GED_DPCMASK_XW,      ///< XE2, XE3
    GED_DPCMASK_YW,      ///< XE2, XE3
    GED_DPCMASK_XYW,     ///< XE2, XE3
    GED_DPCMASK_ZW,      ///< XE2, XE3
    GED_DPCMASK_XZW,     ///< XE2, XE3
    GED_DPCMASK_YZW,     ///< XE2, XE3
    GED_DPCMASK_XYZW,    ///< XE2, XE3
    GED_DPCMASK_INVALID
} GED_DPCMASK;
typedef enum
{
    GED_DP_DATA_SIZE_D8,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D16,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D32,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D64,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D8U32,   ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D16U32,  ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_DATA_SIZE_D16BF32, ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD
    GED_DP_DATA_SIZE_INVALID
} GED_DP_DATA_SIZE;
typedef enum
{
    GED_DP_FENCE_SCOPE_Threadgroup,    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FENCE_SCOPE_Local,          ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FENCE_SCOPE_Tile,           ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FENCE_SCOPE_GPU,            ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FENCE_SCOPE_AllGPU,         ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD
    GED_DP_FENCE_SCOPE_System_Release, ///< XE.HPC.A, XE.HPC, XE2, XE3
    GED_DP_FENCE_SCOPE_System_Acquire, ///< XE.HPC.A, XE.HPC
    GED_DP_FENCE_SCOPE_INVALID
} GED_DP_FENCE_SCOPE;
typedef enum
{
    GED_DP_FLUSH_TYPE_Evict,           ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FLUSH_TYPE_Invalidate,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FLUSH_TYPE_Discard,         ///< XE.HPG, XE.LPG.MD, XE2, XE3
    GED_DP_FLUSH_TYPE_Clean,           ///< XE.HPG, XE.LPG.MD, XE2, XE3
    GED_DP_FLUSH_TYPE_DGT_L3OnlyFlush, ///< XE.HPG, XE.LPG.MD
    GED_DP_FLUSH_TYPE_None,            ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_FLUSH_TYPE_INVALID
} GED_DP_FLUSH_TYPE;
typedef enum
{
    GED_DPONE_ADDR_REG_1_REG,   ///< XE2, XE3
    GED_DPONE_ADDR_REG_INVALID
} GED_DPONE_ADDR_REG;
typedef enum
{
    GED_DP_OPCODE_LOAD,                          ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_LOAD_CMASK,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_STORE,                         ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_STORE_CMASK,                   ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_INCREMENT,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_DECREMENT,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_LOAD,                   ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD
    GED_DP_OPCODE_ATOMIC_STORE,                  ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_ADD,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_SUB,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_MIN,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_MAX,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_UMIN,                   ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_UMAX,                   ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_COMPARE_EXCHANGE,       ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_FLOAT_ADD,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_FLOAT_SUB,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_FLOAT_MIN,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_FLOAT_MAX,              ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_FLOAT_COMPARE_EXCHANGE, ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_AND,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_OR,                     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_ATOMIC_XOR,                    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_STORE_UNCOMPRESSED,            ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD
    GED_DP_OPCODE_FENCE,                         ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_OPCODE_LOAD_2D_BLOCK,                 ///< XE.HPC.A, XE.HPC, XE2, XE3
    GED_DP_OPCODE_STORE_2D_BLOCK,                ///< XE.HPC.A, XE.HPC, XE2, XE3
    GED_DP_OPCODE_LOAD_STATUS,                   ///< XE2, XE3
    GED_DP_OPCODE_RSI,                           ///< XE2, XE3
    GED_DP_OPCODE_APPENDCOUNTER_ATOMIC_ADD,      ///< XE2, XE3
    GED_DP_OPCODE_APPENDCOUNTER_ATOMIC_SUB,      ///< XE2, XE3
    GED_DP_OPCODE_APPENDCOUNTER_ATOMIC_STORE,    ///< XE2, XE3
    GED_DP_OPCODE_LOAD_CMASK_MSRT,               ///< XE3
    GED_DP_OPCODE_STORE_CMASK_MSRT,              ///< XE3
    GED_DP_OPCODE_INVALID
} GED_DP_OPCODE;
typedef enum
{
    GED_DP_TRANSPOSE_SIMT,    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_TRANSPOSE_SIMD,    ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_TRANSPOSE_INVALID
} GED_DP_TRANSPOSE;
typedef enum
{
    GED_DP_VECT_SIZE_V1,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V2,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V3,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V4,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V8,      ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V16,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V32,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_V64,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3
    GED_DP_VECT_SIZE_INVALID
} GED_DP_VECT_SIZE;
typedef enum
{
    GED_DST_CHAN_EN_None,    ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_x,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_y,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xy,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_z,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xz,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_yz,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xyz,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_w,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xw,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_yw,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xyw,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_zw,      ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xzw,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_yzw,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_xyzw,    ///< 10, 7, 7.5, 8, 8.1, 9
    GED_DST_CHAN_EN_INVALID
} GED_DST_CHAN_EN;
typedef enum
{
    GED_EOT_None,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_EOT_EOT,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_EOT_INVALID
} GED_EOT;
typedef enum
{
    GED_EXEC_MASK_OFFSET_CTRL_N1,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N2,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N3,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N4,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N5,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N6,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N7,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_N8,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_Q1,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_Q2,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_Q3,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_Q4,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_H1,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_H2,      ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_EXEC_MASK_OFFSET_CTRL_INVALID
} GED_EXEC_MASK_OFFSET_CTRL;
typedef enum
{
    GED_EXECUTION_DATA_TYPE_Integer, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_EXECUTION_DATA_TYPE_Float,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_EXECUTION_DATA_TYPE_INVALID
} GED_EXECUTION_DATA_TYPE;
typedef enum
{
    GED_FUSION_CTRL_Normal,     ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_FUSION_CTRL_Serialized, ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_FUSION_CTRL_INVALID
} GED_FUSION_CTRL;
typedef enum
{
    GED_HEADER_PRESENT_no,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_HEADER_PRESENT_yes,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_HEADER_PRESENT_INVALID
} GED_HEADER_PRESENT;
typedef enum
{
    GED_IS_IMM_true,    ///< XE3, XE3P.CRI
    GED_IS_IMM_false,   ///< XE3, XE3P.CRI
    GED_IS_IMM_INVALID
} GED_IS_IMM;
typedef enum
{
    GED_LFSR_FC_b32,      ///< XE3P.CRI
    GED_LFSR_FC_b16v2,    ///< XE3P.CRI
    GED_LFSR_FC_b8v4,     ///< XE3P.CRI
    GED_LFSR_FC_reserved, ///< XE3P.CRI
    GED_LFSR_FC_INVALID
} GED_LFSR_FC;
typedef enum
{
    GED_MASK_CTRL_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MASK_CTRL_NoMask,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MASK_CTRL_INVALID
} GED_MASK_CTRL;
typedef enum
{
    GED_MATH_FC_INV,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_LOG,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_EXP,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_SQRT,              ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_RSQ,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_SIN,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_COS,               ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_FDIV,              ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_POW,               ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_INT_DIV_BOTH,      ///< 10, 11, TGL, XE.HP, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_INT_DIV_QUOTIENT,  ///< 10, 11, TGL, XE.HP, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_INT_DIV_REMAINDER, ///< 10, 11, TGL, XE.HP, 7, 7.5, 8, 8.1, 9
    GED_MATH_FC_INVM,              ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_FC_RSQRTM,            ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_FC_TANH,              ///< XE3P.CRI
    GED_MATH_FC_SIGM,              ///< XE3P.CRI
    GED_MATH_FC_INVALID
} GED_MATH_FC;
typedef enum
{
    GED_MATH_MACRO_EXT_mme0,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme1,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme2,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme3,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme4,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme5,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme6,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_mme7,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_nomme,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_MATH_MACRO_EXT_INVALID
} GED_MATH_MACRO_EXT;
typedef enum
{
    GED_MESSAGE_TYPE_MSD0R_HWB,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MSD0W_HWB,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0R_OWB,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0R_OWAB,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0R_OWDB,        ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0R_DWS,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0R_BS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0_MEMFENCE,     ///< 10, 11, TGL, XE.HP, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0W_OWB,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0W_OWDB,        ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0W_DWS,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT0W_BS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_T,           ///< 10, 11, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_US,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_UI,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_UI4x2,       ///< 10, 11, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_MB,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_TS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_TA,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_TA4x2,       ///< 10, 11, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_US,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_MB,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_TC,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_TC4x2,       ///< 10, 11, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_TS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_A64_SB,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_A64_US,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_A64_UI,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_A64_UI4x2,   ///< 10, 11, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1R_A64_B,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_A64_B,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_A64_US,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1W_A64_SB,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT2R_US,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT2R_A64_SB,      ///< 10, 11, 9
    GED_MESSAGE_TYPE_MT2R_A64_US,      ///< 10, 11, 9
    GED_MESSAGE_TYPE_MT2R_BS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT2W_US,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT2W_A64_US,      ///< 10, 11, 9
    GED_MESSAGE_TYPE_MT2W_A64_SB,      ///< 10, 11, 9
    GED_MESSAGE_TYPE_MT2W_BS,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT_CC_OWB,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_CC_OWUB,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_CC_OWDB,       ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_CC_DWS,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_SC_OWUB,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_SC_MB,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_RSI,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_RTW,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT_RTR,           ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_UHI,         ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT1A_TAH,         ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT1A_TCH,         ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT1A_A64_UHI,     ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT1A_UF,          ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT1A_UHF,         ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT1A_A64_UF,      ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 9
    GED_MESSAGE_TYPE_MT1A_A64_UHF,     ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT_US_CCS_OP,     ///< XE.HP, XE2
    GED_MESSAGE_TYPE_MT_US_UCW,        ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT_TS_CCS_OP,     ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT_TS_UCW,        ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT_A64_CCS_PG_OP, ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MT_A64_US_CCS_OP, ///< XE.HP, XE2
    GED_MESSAGE_TYPE_MT_A64_US_UCW,    ///< XE.HP, XE2
    GED_MESSAGE_TYPE_MT_BTD_SPAWN,     ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2
    GED_MESSAGE_TYPE_MTR_MB,           ///< 7, 7.5
    GED_MESSAGE_TYPE_MTRR_TS,          ///< 7
    GED_MESSAGE_TYPE_MTRA_TA,          ///< 7
    GED_MESSAGE_TYPE_MT_MEMFENCE,      ///< 7, 7.5
    GED_MESSAGE_TYPE_MTW_MB,           ///< 7, 7.5
    GED_MESSAGE_TYPE_MTRW_TS,          ///< 7
    GED_MESSAGE_TYPE_MT0R_US,          ///< 7
    GED_MESSAGE_TYPE_MT0A_UI,          ///< 7
    GED_MESSAGE_TYPE_MT0W_US,          ///< 7
    GED_MESSAGE_TYPE_MT1A_UF4x2,       ///< 8, 8.1, 9
    GED_MESSAGE_TYPE_MT1A_A64_UF4x2,   ///< 9
    GED_MESSAGE_TYPE_INVALID
} GED_MESSAGE_TYPE;
typedef enum
{
    GED_NO_SRC_DEP_SET_Normal,      ///< 10, 11, 9
    GED_NO_SRC_DEP_SET_NoSrcDepSet, ///< 10, 11, 9
    GED_NO_SRC_DEP_SET_INVALID
} GED_NO_SRC_DEP_SET;
typedef enum
{
    GED_OPCODE_stub,    ///< all
    GED_OPCODE_illegal, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_mov,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_sel,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_movi,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_not,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_and,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_or,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_xor,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_shr,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_shl,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_smov,    ///< 10, 11, 8, 8.1, 9
    GED_OPCODE_asr,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_cmp,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_cmpn,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_csel,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_bfrev,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_bfe,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_bfi1,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_bfi2,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_jmpi,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_brd,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_if,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_brc,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_else,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_endif,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_while,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_break,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_cont,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_halt,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_calla,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7.5, 8, 8.1, 9
    GED_OPCODE_call,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_ret,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_goto,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_OPCODE_join,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_OPCODE_wait,    ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_send,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_sendc,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_sends,   ///< 10, 11, 9
    GED_OPCODE_sendsc,  ///< 10, 11, 9
    GED_OPCODE_math,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_add,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_mul,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_avg,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_frc,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_rndu,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_rndd,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_rnde,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_rndz,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_mac,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_mach,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_lzd,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_fbh,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_fbl,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_cbit,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_addc,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_subb,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_sad2,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_sada2,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_dp4,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_dph,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_dp3,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_dp2,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_line,    ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_pln,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_mad,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_lrp,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_madm,    ///< 10, 11, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 8, 8.1, 9
    GED_OPCODE_nop,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_OPCODE_ror,     ///< 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_rol,     ///< 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_dp4a,    ///< 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_sync,    ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_add3,    ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_dpas,    ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_OPCODE_dpasw,   ///< XE.HP, XE.HPG
    GED_OPCODE_bfn,     ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_OPCODE_macl,    ///< XE.HPC.A, XE.HPC, XE2, XE3
    GED_OPCODE_srnd,    ///< XE.HPC, XE2, XE3, XE3P.CRI
    GED_OPCODE_sdpas,   ///< XE3
    GED_OPCODE_thryld,  ///< XE3P.CRI
    GED_OPCODE_sendg,   ///< XE3P.CRI
    GED_OPCODE_sendgc,  ///< XE3P.CRI
    GED_OPCODE_sendgx,  ///< XE3P.CRI
    GED_OPCODE_sendgxc, ///< XE3P.CRI
    GED_OPCODE_lfsr,    ///< XE3P.CRI
    GED_OPCODE_shfl,    ///< XE3P.CRI
    GED_OPCODE_dnscl,   ///< XE3P.CRI
    GED_OPCODE_bdpas,   ///< XE3P.CRI
    GED_OPCODE_mullh,   ///< XE3P.CRI
    GED_OPCODE_qmad,    ///< XE3P.CRI
    GED_OPCODE_f32to16, ///< 7, 7.5
    GED_OPCODE_f16to32, ///< 7, 7.5
    GED_OPCODE_dim,     ///< 7.5
    GED_OPCODE_INVALID
} GED_OPCODE;
typedef enum
{
    GED_PRECISION_u8,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_u4,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_u2,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_u1,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_s8,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_s4,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_s2,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_s1,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_f16,     ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_bf16,    ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_bf8,     ///< XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_df,      ///< XE.HPC, XE3, XE3P.CRI
    GED_PRECISION_tf32,    ///< XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRECISION_hf8,     ///< XE3, XE3P.CRI
    GED_PRECISION_e2m1,    ///< XE3P.CRI
    GED_PRECISION_INVALID
} GED_PRECISION;
typedef enum
{
    GED_PRED_CTRL_Normal,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_Sequential, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_anyv,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_allv,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any2h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_all2h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any4h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_all4h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any8h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_all8h,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any16h,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_all16h,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any32h,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_all32h,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.LPG.MD, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_x,          ///< 10, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_y,          ///< 10, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_z,          ///< 10, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_w,          ///< 10, 7, 7.5, 8, 8.1, 9
    GED_PRED_CTRL_any,        ///< XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRED_CTRL_all,        ///< XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_PRED_CTRL_INVALID
} GED_PRED_CTRL;
typedef enum
{
    GED_PRED_INV_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_PRED_INV_Invert,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_PRED_INV_INVALID
} GED_PRED_INV;
typedef enum
{
    GED_REG_FILE_ARF,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_REG_FILE_GRF,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_REG_FILE_IMM,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_REG_FILE_INVALID
} GED_REG_FILE;
typedef enum
{
    GED_REP_CTRL_NoRep,   ///< 10, 7, 7.5, 8, 8.1, 9
    GED_REP_CTRL_Rep,     ///< 10, 7, 7.5, 8, 8.1, 9
    GED_REP_CTRL_INVALID
} GED_REP_CTRL;
typedef enum
{
    GED_RETURN_DATA_CONTROL_Disabled, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_RETURN_DATA_CONTROL_Enabled,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_RETURN_DATA_CONTROL_INVALID
} GED_RETURN_DATA_CONTROL;
typedef enum
{
    GED_ROUNDING_MODE_srnd,    ///< XE3P.CRI
    GED_ROUNDING_MODE_rne,     ///< XE3P.CRI
    GED_ROUNDING_MODE_INVALID
} GED_ROUNDING_MODE;
typedef enum
{
    GED_SATURATE_Normal,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SATURATE_sat,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SATURATE_INVALID
} GED_SATURATE;
typedef enum
{
    GED_SFID_NULL,       ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_SAMPLER,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_GATEWAY,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_DP_DC2,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 9
    GED_SFID_DP_RC,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_URB,        ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_SPAWNER,    ///< 10, 11, TGL, XE.HP, 7, 7.5, 8, 8.1, 9
    GED_SFID_VME,        ///< 10, 11, TGL, XE.HP, 7, 7.5, 8, 8.1, 9
    GED_SFID_DP_DCRO,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, 9
    GED_SFID_DP_DC0,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SFID_PI,         ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7, 7.5, 8, 8.1, 9
    GED_SFID_DP_DC1,     ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, 7.5, 8, 8.1, 9
    GED_SFID_CRE,        ///< 10, 11, TGL, XE.HP, 7.5, 8, 8.1, 9
    GED_SFID_UGML,       ///< XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3
    GED_SFID_BTD,        ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SFID_RTA,        ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SFID_TGM,        ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SFID_SLM,        ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SFID_UGM,        ///< XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SFID_DP_CONST,   ///< XE2, XE3
    GED_SFID_RTGD,       ///< XE3P.CRI
    GED_SFID_DP_GENERIC, ///< XE3P.CRI
    GED_SFID_DP_SAMPLER, ///< 7, 7.5, 8, 8.1
    GED_SFID_DP_CC,      ///< 7, 7.5, 8, 8.1
    GED_SFID_INVALID
} GED_SFID;
typedef enum
{
    GED_SHUFFLE_FC_idx4,    ///< XE3P.CRI
    GED_SHUFFLE_FC_INVALID
} GED_SHUFFLE_FC;
typedef enum
{
    GED_SIMDMODE_SIMD4x2, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SIMDMODE_SIMD16,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SIMDMODE_SIMD8,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SIMDMODE_INVALID
} GED_SIMDMODE;
typedef enum
{
    GED_SLOT_GROUP_SIMD4x2, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SLOT_GROUP_low_8,   ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SLOT_GROUP_high_8,  ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SLOT_GROUP_INVALID
} GED_SLOT_GROUP;
typedef enum
{
    GED_SRC_MOD_Normal,            ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SRC_MOD_Absolute,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SRC_MOD_Negative,          ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SRC_MOD_Negative_Absolute, ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_SRC_MOD_INVALID
} GED_SRC_MOD;
typedef enum
{
    GED_SUB_BYTE_PRECISION_None,    ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SUB_BYTE_PRECISION_s4,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SUB_BYTE_PRECISION_s2,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SUB_BYTE_PRECISION_s1,      ///< XE.HP, XE.HPG
    GED_SUB_BYTE_PRECISION_u4,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SUB_BYTE_PRECISION_u2,      ///< XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SUB_BYTE_PRECISION_u1,      ///< XE.HP, XE.HPG
    GED_SUB_BYTE_PRECISION_e2m1,    ///< XE3P.CRI
    GED_SUB_BYTE_PRECISION_INVALID
} GED_SUB_BYTE_PRECISION;
typedef enum
{
    GED_SUB_FUNC_ID_GetTimeStamp,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SUB_FUNC_ID_BarrierMsg,      ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, 7, 7.5, 8, 8.1, 9
    GED_SUB_FUNC_ID_OpenGateway,     ///< 7, 7.5, 8, 8.1
    GED_SUB_FUNC_ID_CloseGateway,    ///< 7, 7.5, 8, 8.1
    GED_SUB_FUNC_ID_ForwardMsg,      ///< 7, 7.5, 8, 8.1
    GED_SUB_FUNC_ID_UpdateGateState, ///< 7, 7.5, 8, 8.1
    GED_SUB_FUNC_ID_MMIOReadWrite,   ///< 7, 7.5, 8, 8.1
    GED_SUB_FUNC_ID_INVALID
} GED_SUB_FUNC_ID;
typedef enum
{
    GED_SWIZZLE_x,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_SWIZZLE_y,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_SWIZZLE_z,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_SWIZZLE_w,       ///< 10, 7, 7.5, 8, 8.1, 9
    GED_SWIZZLE_INVALID
} GED_SWIZZLE;
typedef enum
{
    GED_SYNC_FC_nop,     ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_grfsb,   ///< TGL, XE.HP, XE.HPG, XE.LPG.MD
    GED_SYNC_FC_allrd,   ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_allwr,   ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_bar,     ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_host,    ///< TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_fence,   ///< XE.HPC.A, XE.HPC, XE2, XE3, XE3P.CRI
    GED_SYNC_FC_flush,   ///< XE2, XE3, XE3P.CRI
    GED_SYNC_FC_INVALID
} GED_SYNC_FC;
typedef enum
{
    GED_THREAD_CTRL_Normal,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_THREAD_CTRL_Atomic,    ///< 10, 11, TGL, XE.HP, XE.HPG, XE.HPC.A, XE.HPC, XE.LPG.MD, XE2, XE3, XE3P.CRI, 7, 7.5, 8, 8.1, 9
    GED_THREAD_CTRL_NoPreempt, ///< 10, 11
    GED_THREAD_CTRL_Switch,    ///< 10, 11, 7, 7.5, 8, 8.1, 9
    GED_THREAD_CTRL_INVALID
} GED_THREAD_CTRL;
#endif // GED_ENUMERATIONS_H
